1. Field of Invention
The present invention relates to a bump layout on a silicon chip. More particularly, the present invention relates to a bump layout on a silicon chip such that pressure is distributed evenly to each bump and maximum permissible pitch is retained between the edges of neighboring bumps to reduce the probability of a short circuit.
2. Description of Related Art
Due to rapid progress in semiconductor device and display device fabrication, multi-media communication is becoming increasingly popular. Although cathode ray tube (CRT) displays can provide relatively high image quality at a low cost, thin film transistor (TFT) liquid crystal display (LCD) devices are gradually replacing CRTs because the TFT LCD is thinner and consumes less power. However, aside from a liquid crystal display panel, a LCD display also needs a driver IC to drive the display panel. In recent years, the demand to display a huge volume of data has jacked up the total number of input/output (I/O) terminals needed on a liquid crystal panel driver. For example, a driver IC having 308, 309, 384 or even 420 input/output terminals is quite common. In addition, the driver IC must correspond in size with the liquid crystal display panel. Hence, the driver IC often has a rectangular plan so that the number of I/O pads along the edges of the driver IC is maximized. Typically, a driver chip and a liquid crystal display panel are joined together in a chip-on-glass (COG) process, a chip-on-film (COF) process, a chip-on-board (COB) process or a tape-automated-bonding (TAB) process.
In a chip-on-glass (COG) method, the bumps on the driver IC are positioned according to the configuration. In a gate driver IC configuration, the total number of input/output terminals is smaller. However, in a source driver IC configuration, the driver IC has more input/output terminals.
FIG. 1 is a top view showing the bump layout of a conventional LCD driver IC. In general, the bumps 102 of a driver IC 100 of most super-twist-oriented LCD (STN-LCD) or TFT-LCD are arranged as a single row along the edges surrounding the active area of the driver IC 100. In other words, the bumps enclose an area on the driver IC 100 containing a circuit 104.
As shown in FIG. 1, the bumps are principally positioned along the edges of the driver IC with the central region reserved for housing the circuits. Since the bumps are placed along the edge in a single file, the maximum number of bumps that can be laid depends on overall peripheral length of the driver IC, size of each bump and pitch between neighboring bumps. Hence, the only way to increase the number of bumps on the driver IC having this type of layout is to shrink the bumps.
FIG. 2 is a top view showing bump layout of a conventional TFT LCD driver IC. As shown in FIG. 2, the total number of bumps 202 on the driver IC 200 is considerably greater than the total number of bumps 102 on the driver IC 100 shown in FIG. 1. Due to the total number of bumps required on the driver IC 200 and consideration regarding the dimensions of the liquid crystal display, the source driver IC is designed to have a narrow rectangular structure. The central area of the driver IC 200 encloses an active region or a circuit region 204. Bumps 202 close to a first edge 206 on one side of the active region 204 are positioned alternately on two rows. Bumps close to a second edge on the opposite side of the active region 204 are positioned in a single row. Furthermore, bumps 202 close to a first short side 210 and a second short side 212 of the driver IC are positioned in an array format.
The bumps 202 on the conventional source driver IC 200 as shown in FIG. 2 are unevenly distributed. In COG manufacturing, this non-uniform bump layout may produce an uneven stress around the peripheral region of the driver IC 200. Thus, fewer cracks will form close to the short edges 210 and 212 and more cracks will form elsewhere. Ultimately, reliability of the assembled structure is compromised.